Margaret Marek-Sadowska
Professor Emeritus
Electrical and Computer Engineering
Affiliation:
Electrical and Computer Engineering
Contact
Fellow of:
Institute of Electrical and Electronics Engineers
Research
Computer Engineering
Research in the area of computer-aided design with an emphasis on layout and logic synthesis of VLSI circuits and systems. Current projects include power verification and optimal designs for power-gating: an efficient technique for lowering power consumption and control leakage currents.
Education
PhD Electrical Engineering, Politechnika Warszawska
MS Applied Mathematics, Politechnika Warszawska