UCSB Engineering

Li Wang

Professor

Electrical & Computer Engineering

Li Wang

Contacts

Department of Electrical and Computer Engineering
University of California
Santa Barbara, CA 93106

tel: (805) 886-6017 (cell)
fax: (805) 893-3262
licwang@ece.ucsb.edu

Personal web site

Research Groups

Biography

From 1996 to 2000, Li-C was a senior CAD software technical staff member at IBM/Motorola Somerset PowerPC Design Center. He received best paper awards from Design Automation and Test in Europe (DATE) conference in 1998, from IEEE VLSI Test Symposium (VTS) in 1999, and from DATE conference in 2003. He co-edited the IEEE Design and Test special issue on speed test and validation in 2003 and the special issue on functional verification in 2003. He co-founded the IEEE Microprocessor Test and Verification (MTV) Workshop. He is a steering committee member for IEEE Test synthesis workshop and Test Economic workshop. He has served as the track chair in Design for Verification and Test area for International Symposium on Quality of Electronic Design (ISQED) since 2004. He is a program committee member for IEEE VTS 03-05, IEEE High Level Design Validation and Test workshop 03-07, International Conference on Computer Design 04-06, IEEE Asian Test Symposium 04-05 and International Test Conference 07. He was the organizer and lead presenter of the tutorial Validation and Verification of Complex Digital Systems and SOCs which was presented in ISQED2001, DATE2003, VTS2001, ITC 2001, and ITC 2003. He is the organizer and lead presenter of the tutorial Dealing With Timing for sub-100nm Designs which are presented in ITC 2005, ITC 2006 and VTS 2007. His research interests include microprocessor test and verification, statistical methods for timing analysis, speed test, and performance validation, and applications of data mining and statistical learning in EDA. He has published more than 80 papers in those areas.

Selected Publications

See complete list of publications
  • A Cirucit SAT Solver with Signal Correlation Guided Learning, Proc, 2003, # ATE 2003 # "A Cirucit SAT Solver with Signal Correlation Guided Learning" Feng Lu, Li-C. Wang, Kwang-Ting Cheng, Ric C-Y. Huang
  • Delay Defect Diagnosis Based Upon Statistical Timing Models -- The First Step, Proc., 2003, Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou
  • Delta-Sigma Modulator Based Mixed-signal BIST Architecture for SoC, Proc. ACM/IEEE ASP Design Automation Conference, 2003, Chee-Kian Ong, Kwang-Ting (Tim) Cheng and Li.-C Wang
  • Diagnosis of Delay Defects Using Statistical Timing Models, Proc. IEEE VLSI Test Symposium, 2003, Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou
  • Enhanced Symbolic Simulation For Efficient Verification of Embedded Array Systems, Proc. ACM/IEEE ASP Design Automation Conference, 2003, Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Manish Pandey, and Magdy S. Abadir
  • Experience in Critical Path Selection For Deep Sub-Micron Delay Test and Timing Validation, Proc. ACM/IEEE ASP Design Automation Conference, 2003, Jing-Jia Liou, Li-C. Wang, Angela Krstic, Kwang-Ting Cheng
  • On Structural Vs. Functional Testing for Delay Faults, Proc. ISQED, 2003, Angela Krstic, Jing-Jia Liou, Kwang-Ting Cheng, Li-C. Wang
  • Analysis of Delay Test Effectiveness with Multiple-Clocked Scheme, Proc. International Test Conference, 2002, Jing-Jia Liou, Li-C. Wang, and Kwang-Ting Cheng, J. Dworak, R. Mercer, R. Kapur, T. W. Williams
  • Fortuitous Detection and its Impact on Test Set Sizes Using Stuck-at and Transition Faults, Proc. IEEE Defect and Fault-Tolerance Symposium, 2002, J. Dworak, J. Wingfield, B. Cobb, S. Lee, L-C. Wang, and R. Mercer,
  • Testing High-Performance Custom Circuits without Explicit Testing of The Internal Faults, Proc. International Test Conference, Baltimore, 2002, Li-C. Wang, Magdy S. Abadir, and Juhong Zhu
  • Theoretical and Practical Considerations of Path Selection for Delay Fault Testing, Proc. International Conference on Computer-Aided Design (ICCAD), 2002, Jing-Jia Liou, Li-C. Wang, and Kwang-Ting Cheng