UCSB Engineering

Behrooz Parhami


Electrical & Computer Engineering

Behrooz Parhami


Department of Electrical and Computer Engineering
University of California
Santa Barbara, CA 93106-9560

tel: (805) 893-3211
fax: (805) 893-3262

Personal web site

Biswapped Hierarchical Interconnection Network

Biswapped Hierarchical Interconnection Network

Hamilotonian cycle construction in a biswapped network

Research Description

Parhami's research spans three overlapping subfields within computer architecture: (1) Parallel computer architecture, with particular focus on the assessment of performance, complexity, and fault tolerance in interconnection networks. (2) Computer arithmetic, focusing on redundant and other unconventional number representation systems, and table-based methods. (3) Dependable and fault-tolerant computing. A complete list of publications in these areas, including electronic copies of the papers, can be found at: http://www.ece.ucsb.edu/~parhami/publications.htm


Prior to joining the UCSB faculty, Parhami was at Sharif (formerly Arya-Mehr) University of Technology in Tehran, Iran (1974-88), where his activities also entailed educational planning, curriculum development, standardization efforts, technology transfer, and various editorial responsibilities, including a five-year term as Editor of Computer Report, a Persian-language computing periodical. He spent 1986-88 on sabbatical leaves at University of Waterloo and Carlton University in Canada. His publications include more than 270 peer-reviewed journal and conference papers and three textbooks on parallel processing (Plenum, 1999), computer arithmetic (Oxford, 2000; 2nd ed. 2010; int'l ed. 2012), and computer architecture (Oxford, 2005).


  • Associate Editor of IEEE Transactions on Computers
  • Former Member of Editorial Board, Journal of Parallel, Emergent and Distributed Systems
  • Former Associate Editor, IEEE Transactions on Parallel and Distributed Systems


  • Certificate of Appreciation for service as Associate Editor of IEEE TPDS, 2013
  • Life Fellow, IEEE, 2013
  • Journal of Parallel and Distributed Systems Top-Cited Article Award, 2010
  • IET Circuits, Devices & Systems Premium Achievement Award, 2009
  • Centennial Medal, IEEE, 1984
  • Chartered Fellow, British Computer Society
  • Chartered Information Technology Professional, United Kingdom
  • Distinguished Member, Informatics Society of Iran
  • Fellow, IEEE
  • Fellow, Institute of Engineering and Technology

Selected Publications

See complete list of publications
  • An Efficient Universal Addition Scheme for All Hybrid-Redundant Representations with Weighted Bit-Set Encoding, Journal of VLSI Signal Processing, Vol. 42, No. 2, 2006, 149-158, G. Jaberipur, B. Parhami, and M. Ghodsi., web link
  • Cayley Graphs as Models of Deterministic Small-World Networks, Information Processing Letters, Vol. 97, No. 3, 2006, 115-117, W. Xiao and B. Parhami., web link
  • Swapped Interconnection Networks: Topological, Performance, and Robustness Attributes, Journal of Parallel and Distributed Computing, Special Issue on Design and Performance of Networks for Super-, Cluster-, and Grid-Computing, Vol. 65, No. 11, 2006, 1443-1452, B. Parhami, web link
  • Perfect Difference Networks and Related Interconnection Structures for Parallel and Distributed Systems, IEEE Transactions on Parallel and Distributed Systems, Vol. 16, No. 8, 2005, 714-724, B. Parhami and M. Rakov., web link
  • Performance, Algorithmic, and Robustness Attributes of Perfect Difference Networks, IEEE Transactions on Parallel and Distributed Systems, Vol. 16, No. 8, 2005, 725-736, B. Parhami and M. Rakov., web link
  • The Hamiltonicity of Swapped (OTIS) Networks Built of Hamiltonian Component Networks, Information Processing Letters, Vol. 95, No. 4, 2005, 441-445, B. Parhami, web link
  • Voting: A Paradigm for Adjudication and Data Fusion in Dependable Systems, Chapter 4 in Dependable Computing Systems: Paradigms, Performance Issues, & Applications, 2005, 87-114, B. Parhami, web link
  • Weighted Two-Valued Digit-Set Encodings: Unifying Efficient Hardware Representation Schemes for Redundant Number Systems, IEEE Transactions on Circuits and Systems – I: Regular Papers, Vol. 52, No. 7, 2005, 1-15, G. Jaberipur, B. Parhami, and M. Ghodsi., web link
  • Incomplete k-ary n-cube and Its Derivatives, Journal of Parallel and Distributed Computing, Vol. 64, No. 2, 2004, 183-190, B. Parhami and D.-M. Kwai, web link
  • Tight Upper Bounds on the Minimum Precision Required of the Divisor and the Partial Remainder in High-Radix Division, IEEE Transactions on Computers, Vol. 52, No. 11, 2003, 1509-1514, B. Parhami, web link